Teradyne delivers the broadest range of device test coverage,
optimized for high production efficiency, high throughput,
and low test cost.
Tiger
Tiger
shares the Catalyst Family's zero-time DSP architecture, IMAGE software,
and state-of-the-art analog instruments, and extends digital capability
to 1024 pins and full I/O switching at up to 1.6 Gbps, with single-ended,
differential, and common mode drive and compare on every pin. Tiger
delivers economical, high-throughput production test of high performance
devices, like graphics processors and chipsets.
Catalyst
Catalyst dominates
the SOC tester market with over 1100 systems shipped, delivering full
test coverage for DSL, wireless/RF, networking, and power management
applications. Catalyst offers multi-site testing, providing the best
test economics and the most complete array of analog instrumentation
for broad test coverage and production flexibility.
J750
J750 delivers
up to 1024 digital channels and offers a suite of options that broaden
the range of test capabilities to memory and mixed-signal applications.
Its zero-footprint design and multi-site parallel test provide the
most economical approach for testing complex VLSI devices with embedded
memory and analog cells.
FLEX
FLEX increases
productivity with a tester-per-pin SOC architecture that aligns fully
parallel, self-contained instrumentation, a universal slot tester-in-a-test-head
design allowing any mix of instrument resources, and multi-level software
with template programming, device-specific test procedures, and low
level system control.
