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  • Traditional Physical I/O Backed with FPGA Configurability

    HSSub 9060Best choice when current or future requirements include: 

    • RS-485/RS-422 bidirectional signaling, backed with FPGA configurability
    • HOTLink bus support to 1500 Mb/s
    • Discrete ECL signaling backed with FPGA configurability
  • Technical Description
    • Flexible low-level HSSub Tier 1 I/O Bus Processing
      • Reconfigurable HSSub Tier 1 (I/O Bus Processing) of the HSSub Three Tier Architecture implemented by a large Test Defined FPGA and local memory
      • Configured in seconds by HSSub Apps supported by Teradyne, end-users, and third-party developers
      • HSSub App development, if required, is simplified by FPGA template code based on standard design patterns
      • HSSub TriFlex Infrastructure Software interfaces provide access to the hardware from Windows Tier 3 or HSSub Tier 2 instruments
    • Contact Teradyne regarding availability of Flexible IO Expansion Instruments with alternate Physical Interface Module configurations
  • Key Attributes