Teradyne Introduces the IP750EP for High-Speed Test of Image Sensor Devices

KUMAMOTO, Japan--(BUSINESS WIRE)--Dec. 2, 2004--Teradyne, Inc. (NYSE:TER) announced the Semiconductor Test Japan Division has started shipment of the IP750EP, a new extended performance CCD/CMOS image sensor test system. The IP750EP addresses the demands of testing high-speed, high-pixel density image sensor devices at a reduced test cost. Since the introduction of the IP750 family of test systems in 2000, more than 350 IP750 and IP750EP systems have shipped. Teradyne will be highlighting the new IP750EP test system at SEMICON Japan this week in Tokyo, Japan.

"The IP750 has dominated the image sensor tester market with more than 65% market share since we started shipping the system in 2000," said Shuzo Kato, Teradyne Japan division manager. "As the leader in this market, we will continue to provide our customers with enhanced image sensor testers that deliver the performance required to respond to changing device trends to meet the demand of the market. The IP750EP is designed with the most up-to-date parallel test capability and provides a drastic reduction in test cost."

Since its announcement at SEMICON Japan in December 2000, the IP750 has gained the top share in the image sensor test system market. The system has shipped to South Korea, U.S., Taiwan, Europe and Japan and is currently being recognized as a de-facto standard tester used for testing both CCD and CMOS image sensor devices. The IP750EP, a successor of the IP750, can support capturing of analog and digital images with a frequency of 100MHz. The IP750EP has remarkably reduced the test time by means of high-speed mass data transfer and test time automatic optimization software. It has also improved cost performance by enhancing the parallel test capability increasing the maximum number of sites from 8 to 16. On-site upgrade from IP750 to IP750EP is available, and the compatibility of the measurement program is maintained in the IG-XL software environment. Test time automatic optimization software contributes to a significant reduction in the program development time and alleviation of the load to engineers by automatically performing test program optimization for concurrent processing of each process.

About IP750EP
IP750EP employs the INTEGRA J750 VLSI test system with the 100MHz digital function as its platform and incorporates the latest architecture developed to meet the testing needs of CCD/CMOS image sensor devices. It enables high-speed parallel testing of multiple devices ranging from high-speed CCD devices with more than 10 million pixels to CMOS image sensor devices requiring the digitized pixel capture function, thus realizing test cost reduction to the maximum extent. The IP750EP utilizes the Teradyne® IG-XL software development environment, which introduced Microsoft® Excel®, Visual Basic®, and other Windows® software to the ATE industry for the first time, aiming at an increase in speed and easiness of test program development.

About Teradyne
Teradyne (NYSE:TER) is a leading supplier of Automatic Test Equipment and interconnection systems. The company's products deliver competitive advantage to the world's leading semiconductor, electronics, automotive and network systems companies. In 2003, Teradyne had sales of $1.4 billion, and currently employs about 6,300 people worldwide. For more information, visit www.teradyne.com. Teradyne® is a registered trademark of Teradyne, Inc. in the US and other countries. All product names are trademarks or registered trademarks of Teradyne, Inc. (including its subsidiaries) or their respective owners.