MUNICH, Germany--(BUSINESS WIRE)--April 24, 2001--Teradyne introduced today a new set of analog instrumentation available with the J750 Family of test systems. Teradyne adds the Analog Pin Measurement Unit (APMU) to its set of analog instrumentation, helping to address the semiconductor manufacturer's need to further cut the cost of testing mixed-signal devices. The Mixed-Signal Option, the first in the series of analog instrumentation introduced last year, consists of an Analog Signal I/O Module and a companion Digital Signal I/O Module (DSIO). The ASIO and DSIO modules provide multiple device test channels on each module, with up to 32 test sites supported in the J750 test system.

Frank Westerhoff, product manager at Teradyne, said, "We are excited to be able to expand our analog testing capabilities to offer a completely integrated mixed-signal test solution. The APMU option is Teradyne's latest innovation for multi-site, mixed-signal testing. The APMU features a complete 64 channels of independent 4 quadrant supplies for voltage and current measurements, which helps increase parallel test throughput and device synchronization."

Frank also said, "The J750 APMU option is an ideal solution for our European mixed-signal customers. The J750 offers a broad suite of analog and digital instrumentation to cover the widest range of system-on-a-chip and mixed-signal testing requirements. We will continue to add instrumentation options to expand the product's coverage and solve specific customer test problems."

J750 Analog Instrumentation Set for Mixed-Signal Testing

Analog Pin Measurement Unit

The APMU, especially designed for testing mixed-signal devices, is a full-size board that accommodates a maximum of 8 APMU rider boards, which can be installed onto the APMU motherboard. Each APMU rider board has 8 channels of per-pin source and measurement functionality. The maximum APMU channels on an APMU motherboard is 64 channels. The APMU features full 4 quadrant operation, internal ganging capability and supports multi-site testing for high parallel test throughput.

Analog Signal I/O Module

The ASIO is a channel board that provides four independent analog source and analog capture channels and is fully integrated with the digital instrumentation in the J750. Each ASIO analog channel (source or capture) is fully independent with embedded DSP, source and capture memory and per-pin continuity measurement capability. Up to 32 source and 32 capture instruments can be configured in the J750 and are assignable to any test site.

Digital Signal I/O Module

Each DSIO module requires a digital channel board and therefore the J750 can be configured with as many DSIOs as there are digital channel boards in a system. The DSIO module provides digital source and capture at up to 50MHz, up to 32-bit serial source and capture, up to 32-bit parallel source and capture.

High Level Test Programming Support

Test Elements and Test Procedures developed for the J750 family of test systems, represents a new test creation model, utilizing a graphical language for specifying tests at a level between the code-based model and the template-based model. Test Elements and Test Procedures provide the flexibility and power required for efficiently implementing and optimizing tests for mixed signal devices. Due to its graphical nature and convenience features, the Test Procedure test creation model is easy to learn and use, allowing test engineers to become more productive more quickly.

Pricing

The APMU option is scheduled to ship in Q2 and the MSO option is shipping now, both are priced in accordance with the J750's model to deliver the lowest overall cost of test.

About INTEGRA Test Technology

Teradyne INTEGRA Test Technology is an engineering methodology for creating systems and products that uniquely integrate electronic, mechanical, and software capabilities to deliver low cost, high parallel semiconductor test solutions. Teradyne's INTEGRA Test Technology puts the J750 Family of semiconductor test systems into action. The J750's high integration places an entire 64 channel digital sub-system onto a single circuit board using design innovations that isolate the digital and analog sections of the chip to prevent interaction between channels. Up to 1024 digital channels are available in a zero-footprint "tester in a test head" system design that easily interfaces under a handler or on top of a prober.

The J750's IG-XL software creates a simplified object-oriented programming environment using familiar off-the-shelf software components. And, the J750 readily tests up to 32 devices in parallel, with unmatched test efficiency to deliver high throughput that lowers the cost of test. With new options, new systems, and new test solutions, Teradyne INTEGRA Test Technology will continue to deliver the architecture, hardware, and software that ensure high test coverage with the lowest cost of test.

About Teradyne

Teradyne (NYSE: TER) is the world's largest supplier of automatic test equipment and high performance interconnection systems for the electronics, telecommunications and Internet industries. In 2000, the company had sales of $3.0 billion with a year-end headcount exceeding 10,000 employees. Teradyne products are used to test semiconductors, circuit assemblies, telephone lines and broadband networks. Teradyne's backplane assemblies and high-density connectors are used in the communications and computing systems central to the Internet infrastructure. More than 70% of the company's business is driven by Internet growth.