Semiconductor Test is a lead-
ing supplier of semiconductor test equipment for logic, RF, analog,
power, mixed-signal, and memory technologies. We deliver test solutions
to developers and manufacturers of a broad range of integrated
circuits, packaged separately or integrated as System-On-a-Chip (SOC)
or System-In-Package (SIP) devices. ICs tested by Teradyne are used in
computing, communications, consumer, automotive, identification, and
internet applications.
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| Home > ITC 2008 |
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See Teradyne at ITC Test Week 2008 |
PANELS |
"Analog Test Technology: Stable and Grounded or Open Loop and Spurious?"
Wednesday, October 29, 4:15 pm- 5:45 pm - Panel 2
Panelist: Thomas Anderson, Teradyne (Other panelists: S. Goyal, National Semiconductor, T. Schmitz, Intersil and S. Sunter, LogicVision) |
| Reuse spanning decades of analog test circuits (Op-amp measurement loops), ATE, and test methodology will be discussed with solutions for the future. DSP, BIST, ATE vs. load board solutions, trimming, precision measurements and other analog topics will be discussed. |
TECHNICAL PRESENTATIONS |
"Consideration of IEEE 1641-2004 Applied to Semi Test Software "
Thursday, October 30, 8:30 - 10 am - Session 22, Software to the Rescue
Speakers: Dan Thornton, Bethany Van Wagenen, Jon Vollmar, Teradyne |
TUTORIALS
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"A Tutorial on STDF Fail Datalog Standard"
Thursday, October 30, 8:30 - 10 am, AIP Session 2
Coordinator: John Rowe, Teradyne (Other panelists: A. Khoche, P. Burlison, Verigy and G. Plowman, Qualcomm) |
ITC STEERING COMMITTEE |
Ken Mandl - Member at Large on Steering Committee,
Chair of the "Automotive Test Practices" Session in the "Advanced Industrial Practices" Lecture Series
Donna McNeill - Arrangements Vice Chair |
For more information, please visit the ITC web site at http://www.itctestweek.org/
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