3rd Generation SOC Test Architecture
The Tiger test system features a true mixed-signal architecture, with complete, highly repeatable synchronization of digital patterns and analog instrument source and capture. For synchronizing multiple analog and digital instruments, the Tiger Vector Bus™ control uses pattern MicroCode, maximizing test repeatability and reducing the need for multiple pattern runs. You achieve more accurate testing while minimizing overall test time. Tiger’s IMAGE test development environment provides a full suite of tools to support test engineering in all facets of test programming and debug. Programs are written in terms of the DUT-timing-cycle, not according to tester needs. The Tiger system's DUT-centric testing approach supports device characterization and cell test, but more importantly, delivers thorough end-use testing, at speed, in production, for comprehensive fault coverage. Tiger’s zero-time Background DSP™ processing enables fast test instrument setup/data capture performed in parallel with fast data move/process/test to minimize overall test time. This parallel design delivers consistently higher throughput and lower cost per test.
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