This Q&A panel session provides an opportunity for attendees to ask questions related to the following presentations covering Advanced SOC Techniques:

• UltraFLEXplus DCVS Alarm Setting to Avoid Burned Probe Cards
• Understanding UltraFLEXplus Specifications
• Efficient Jitter Measurements of Low Frequency Asynchronous Clock Outputs on the UltraFLEX Family
• 112Gbps PAM4 and NRZ PHY Layer Testing Using Third Party Instruments
• Alarms Reporting, Processing and Debugging on UltraFLEXplus
• Implementing and Debugging the Serial Wire Debug Interface
• Introducing Repeatable Code Sequences on the UltraFLEXplus
• Fast Throughput on the UltraFLEXplus Enabled by the PACE Architecture and Site-Aware Variables