Test challenges continue to increase as semiconductor geometries become smaller and packaging complexity increases. System level test (SLT) is becoming more common as a method to meet these challenges. In parallel with the rise of SLT, testing across the lifecycle of parts is also becoming more common. With these changes, it is increasingly useful to run scan tests at SLT and in the field. Running scan at SLT is a low-cost way to run high-yield patterns that might seem marginally cost effective to run at final test. Running scan in the field provides better diagnostic capabilities and high-protocol scan testing – serial scan using high level protocols such as USB or PCIe – is a way to achieve these goals. The use of standard protocols allows the DUT’s scan features to be easily accessible at SLT and in the field given the necessary hardware can be designed to be highly parallel (SLT) or portable (field). This presentation will discuss what high-protocol scan testing is and how it meets the challenges described above.