A common requirement of ATE device test solutions is to provide tight timing repeatability across a sequence of tester actions. This capability is needed to meet device specs, optimize test time or maximize yield. The usage varies widely across device types and test blocks within a program, and often spans analog and digital tester resources. The Parallel Advanced Command Execution (PACE) architecture, unique to the UltraFLEXplus, provides an exclusive approach to a repeatable test sequence while being extremely easy to implement. With only two lines of additional code, a section of tester commands can be set as a “Repeatable Code Sequence” block. Another important benefit is that the development and production environments all use the same implementation and behavior, facilitating debug and correlation by not introducing different modes, which is not possible with solutions that develop and debug in a code approach but convert to a pattern-based approach for production. In this presentation, you will learn about this new capability, available in IG-XL 10.30.00, which can work seamlessly with the PACE architecture to preserve the test time optimization already provided by the system.