For a custom Parallel Data (MPD) bus/interface, the differential clock output from the DUT and the 28bit parallel data output pins from the DUT at 1000Mbps have a source-synchronous relationship. Classical functional testing methodologies do not account for such characteristics and as a result, if the standard test comparators on fixed edge in the vector is used the output data may fail the requirement. Source synchronous testing provides an effective method for eliminating phase and voltage jitter by using both clock and data signals from a DUT. This presentation will describe the precondition of source synchronous uses and DIB design, UltraPin1600 channel selection guidelines and the test requirements of MPD for this case. We’ll also compare the standard functional test with a workaround method of using customized multiple time sets of strobes, with source-synchronous to collect clock reference offset and output data voh/vol parameter for capturing and post-processing to check the shmoo eye. Finally, we’ll compare and contrast the stability and efficiency with and without source-synchronous.