When chip-on-chip, chip-by-chip or other monolithic ICs would allow concurrent testing, but the tester’s digital pattern generator is busy with running long ATPG patterns, there is no possibility left to provide SPI/JTAG etc. commands to put the analog part into test modes. The proposed approach allows the uploading of command sequences for various serial/parallel protocols into a controller (e.g., during UserInit()) and then sending them to the DUT at e.g., PSQ/MCU clock pulses or at I2C commands, allowing the analog parts to be put into test modes and so enabling them to be tested concurrently during ATPG pattern runs. The solution utilizes a micro-controller with an I2C slave and several master interfaces as well as level shifters and some glue logic with pass-through mode for digital signals. It can be implemented as a module supporting one or more sites depending on the selected micro-controller.