Introduction to AI Chip Testing Solution Based on UltraFLEXplus | Teradyne

With the rapid development of artificial intelligence technology, AI chips have become the core hardware driving progress in this field. However, accurately assessing the performance of AI chips and implementing efficient grading is a key issue faced by current ATE testing. This article aims to introduce an AI chip testing solution based on the UltraFLEXplus (UFP) platform, discussing its application in functional implementation, Partial Good grading strategy, and thermal management. Firstly, the article will briefly introduce the universal testing solutions for CPU/GPU/AI chips implemented on the UFP testing platform, including traditional Process-Voltage-Temperature (PVT) analysis, Physical Layer testing (PHY), Scan testing (SCAN), and Memory Repair (MR). Subsequently, considering the grading requirements of AI chips that necessitate a comprehensive consideration of computing speed, memory bandwidth, power consumption, application scenarios, scalability, and other specific functions, this article will focus on introducing a multi-site, systematic testing and grading method based on UFP. A demo program will illustrate the process of Partial Good grading to readers. Lastly, in view of the high current issues that AI chips may encounter during testing, the final part of this article will explore the design of thermal management and current monitoring schemes. This includes over-temperature protection mechanisms, simultaneous profiling functions for voltage & current, and the design of current monitoring circuits for core power supplies. In summary, the AI chip testing solution based on UFP proposed in this article enhances testing efficiency and accuracy. The discussions on thermal management and current monitoring provide strong support to ensure reliability and stability during the ATE process.