As semiconductor complexity continues to increase, debugging new devices presents significant challenges. Engineers must navigate complex hardware and software interactions, often with limited visibility into the root causes of issues. The earlier the issues are discovered and resolved, the faster the device can reach the market. However, this process can be time-consuming and resource-intensive – especially when working with cutting-edge technology.
← Go back
NXP Speeds Time to Market with Teradyne Portbridge and Lauterbach TRACE32
The Challenge
Modern embedded processors rely on complex boot firmware to initialize hardware and prepare the system for operation. However, this firmware can also introduce challenges during early testing – especially when issues arise. During first silicon debug at probe, NXP® Semiconductors – the trusted partner for innovative solutions in the automotive, industrial & IoT, mobile, and communications infrastructure markets—encountered such a challenge. Debugging boot firmware issues is particularly difficult due to limited visibility into the system’s early state, a problem further complicated by the intricacies of wafer probe. Resolving these issues often requires collaboration across multiple engineering disciplines.
The Teradyne Solution
Using Teradyne PortBridge, which streamlines the test design to production process, NXP was able to perform core debug directly on an UltraFLEXplus tester with Lauterbach’s TRACE32® tools, a suite of leading-edge hardware and software components that enable engineers to analyze, optimize and certify all kinds of embedded systems.
Typically, NXP would have had to wait for the packaged part to beginning debugging. However, by using PortBridge with Lauterbach’s TRACE32, they proactively gathered and shared configuration instructions to help global validation teams avoid the issue.
Solution Benefits
The use of Teradyne’s PortBridge and Lauterbach’s TRACE32 tools delivered measurable reductions in debug time for NXP. The team was able to begin diagnosing failures at the wafer level – two weeks earlier than their usual process, which requires waiting for packaged parts. Using PortBridge at wafer probe allowed them to quickly resolve issues and meet customer delivery milestones.
Additionally, the validation process was streamlined due to the advanced instructions they could share with global teams ahead of receiving packaged parts. Lastly, the ability to shift tests between bench and the UltraFLEXplus enabled the NXP team to gain insights and implement feedback much earlier in the development cycle.
The Deployment
As the timelines for getting devices to market shrink and engineering resources become increasingly stretched, tools like Lauterbach’s TRACE32 and Teradyne’s Portbridge help companies maximize engineering capacity while ensuring on-time product delivery. NXP is already exploring additional use cases for Portbridge, leveraging its ability to transfer scripts between the bench and the tester, record and transcribe transactions, and utilize protocol-aware features to capture input and output from the device without generating new patterns.
